Power
Suddenly, We Care

For years it was like a slogan. "FPGAs are nice, but they're power hogs." For the customers that kept the lights on, however, buying thousands of FPGAs for backplane-based, rack-mounted equipment with monster power supplies and plenty of cooling, considerations like performance, I/O, and density far outweighed power as a design-in concern. If a new FPGA family offered a 50% performance increase or doubled the LUT count over the previous generation, damn the heatsinks and full-speed ahead. Designers rolled FPGAs in with reckless abandon.

Today, however, forces are conspiring to bring power concerns off of the back burner and into the forefront of FPGA design consideration. As the day approaches when firing up your FPGA-based network router threatens to cause brown-out conditions in neighboring counties, even the traditional FPGA consumer may think it's time to cool things down a bit. With high-end devices today based on 90nm processes, dynamic power consumption per gate has continued to drop, but it is largely offset by increased density. Additionally, static or leakage current as a percentage of total power consumption is on the rise due to smaller geometries. The net result is a generation of devices that require careful attention to power, from their initial design through their final application in FPGA-based systems.

"Even the fellows in wireless base stations and wired-access markets are feeling the power problem," says Anil Telikepalli – Marketing Manager for Virtex Solutions at Xilinx. "When infrastructure equipment is outside in sun, like the green boxes you see alongside the roads, temperatures in the chassis can reach 50-60 degrees C, so junction temperatures can easily rise to 85 degrees. At that temperature, static power goes up significantly, generating even more heat." [more]